The present invention concerns a heating and temperature control system for a data storage apparatus comprising at least one matrix-addressable ferroelectric or electret memory device, wherein the at least one memory device comprises a ferroelectric or electret memory material provided as a global or patterned thin film forming a memory layer in the memory device, a first set of parallel stripe-like electrodes provided in direct or indirect contact with the memory layer on a surface thereof, a second set of parallel stripe-like electrodes provided oriented orthogonally to the electrodes of the first set and in the same relationship to the memory layer, but on the opposite surface thereof, such that the electrodes of one set constitutes word lines of the at least one memory device and the electrodes of the other set bit lines thereof, wherein a memory cell is defined in a volume of the memory material between a word line and a bit line, such that the number of memory cells in the at least one memory device is given by the number of crossings between word lines and bit lines therein, wherein stored data are represented by one of two specific memory cell polarization states which can be set, detected or changed into the opposite polarization state by applying a potential difference over the memory cell as given by appropriately selected voltage levels applied to the word line and bit line electrodes defining the memory cell, the potential difference corresponding to a switching voltage Vs selected higher than a temperature-dependent coercive voltage Vc of the memory cell; as well as a method for operating a heating and temperature control system.
State of the art memory devices are specified to tolerate substantial variations in operating temperatures, but technical barriers impose restrictions that severely undermine device applicability in many cases. For certain types and projected uses of the memory devices in question, there is a clearly articulated need for future memory systems that are able to operate properly at any temperature in a range between −20 C and +80 C. This vast range in temperature presents substantial design and implementation problems, both for traditional silicon-based memory devices as well as for the emerging non-volatile memories based on ferroelectric and electret materials.
A particularly promising sub-class of the latter is based on organic polymers such as the copolymer P(VDF-TrFE). Whereas such materials exhibit very good qualities in many respects, they are still limited by impaired performance and performance deterioration at low and at high temperatures. Examples of qualities that are affected are operating voltage, device speed, write disturb, imprint and cell fatigue, terms which are well-known to the person skilled in the art. Reasons for the problems can be traced to fundamental attributes of ferroelectrics and electrets that e.g. cause sluggish polarization reversal at low temperatures, as well as interface phenomena in the memory devices at points where the memory substance, i.e. the ferroelectric or electret material, is in contact with (typically metallic) electrodes. Electrode materials, processes and interface materials have been developed that provide satisfactory performance in certain temperature regions, but when the range of operation temperatures for one and the same device is extended to low and high temperatures, the worst case device performance is restricted, as are the number of materials, processes and device architectures that can be used.
From International publication WO2004/025658 there is known a method for operating a ferroelectric or electret memory device. This method particularly concerns applying correction factors to voltage pulses used for reading, refreshing, erasing or writing the memory cells in a ferroelectric or electret memory device. Given that the level of the applied voltage pulses remain the same, a specific memory cell response, for instance switching time or its dynamic polarization behaviour, may change depending on environmental factors or an operatively induced change in conditions that affect the dynamic response behaviour of the memory cells. A parameter that may change due to either environmental or operating factors is the actual temperature of a memory cell and it is well-known that temperature influences the dynamic response of ferroelectric and electret materials, particularly because the coercive field is reduced with an increasing temperature. Consequently also the applied switching voltage can be reduced in proportion to the change in the coercive field. In addition voltage pulse levels as given by the applied voltage pulse protocol, of course, usually as fractions of the switching voltage are then also changed proportionately to the change in the latter switching voltage level.
However, instead of adjusting for instance the voltage pulse parameters to a change in the operating temperature, it could be advantageous to set and maintain an optimal operating temperature in the ferroelectric memory material and hence it would not be required to adjust any voltage pulse parameters applied in the addressing operations. In that connection it should be observed that when the coercive field of ferroelectric or electret materials diminishes with an increase in the temperature of the material, the switching voltage can be also set lower, with the added advantage of reducing the effect of disturb voltages to for instance unaddressed cells in a passive matrix-addressable ferroelectric memory.
In U.S. Pat. No. 6,332,322 (Tanaka, assigned to NEC Corp.) there is disclosed an electronic device with a functional device whose function is achieved at a particular temperature or whose performance is enhanced at a particular temperature. To this end the document teaches a temperature control device for cooling and/or heating a functional device to its desired operating temperature in a reasonably short time and controlling the temperature accurately. The thermal transducers for converting electricity to heat or vice versa are incorporated in a thermally isolated diaphragm formed above a substrate, and particularly this thermally isolated diaphragm includes a device portion which is isolated from the substrate by a cavity. Functional devices may for instance be signal processing circuits, detector circuits, memory circuits or various superconducting devices can be mounted on the device portion of the thermally isolated diaphragm and in thermal contact therewith, such that they can be stabilized at their optimal operating temperature.
Although a temperature control device of this kind can be effectively operated it occupies a fairly large volume and are in relation to the functional circuitry itself and is no solution to the particular problem of controlling the temperature say in a limited portion of an integrated circuit or a memory device, for instance limited to the memory material itself. It is evident that a considerable advantage can be gained if it were possible to obtain an efficient temperature control in an integrated circuit or in a high-density memory device by incorporating the thermal transducers in the circuit itself.